(1) Field of the Invention
The invention relates to a method of polishing in the fabrication of integrated circuits, and more particularly, to a method of improved chemical-mechanical polishing in the manufacture of integrated circuits.
(2) Description of the Prior Art
Chemical-mechanical polishing is used in the art for global planarization of dielectric layers as well as metal layers. A polishing pad having a roughened surface is used to planarize the wafer. During polishing, slurry is used (directly and indirectly) to polish the wafer. After the polishing pad has been used to polish a number of wafers, its surface becomes flattened. The surface can again be roughened by a process known as conditioning. For example, a diamond-embedded wheel or dresser is applied to the pad while the polishing table continues to rotate. Another function of the slurry is to remove particles or any foreign object from the polishing table. Due to the cost of the slurry, the process will call for a minimum amount of slurry to be used during polishing. This is fine when it is used to removed particles, but ineffective when used to remove diamond bits that have fallen off the dresser as the dresser's diamond bits are too heavy to be washed away by the slurry. The diamond bits remaining on the polishing table will scratch the wafers. It is desired to find a process that will remove the heavy particles such as diamond bits from the polishing table.
U.S. Pat. No. 5,885,147 to Kreager et al discloses an apparatus for conditioning a polishing pad. For example, the apparatus may comprise diamond particles. U.S. Pat. No. 5,830,043 to Aaron et al shows a CMP apparatus with built-in pad conditioner. U.S. Pat. No. 5,791,970 to Yueh discloses a slurry recycling system wherein a funnel collects slurry flowing off the platen and filters it for recycling. U.S. Pat. No. 5,709,593 to Guthrie et al discloses a CMP tool with a slurry distribution system. U.S. Pat. No. 5,897,425 to Fisher, Jr. et al shows a vertical polishing device to remove contaminants that may scratch the wafer. U.S. Pat. No. 5,605,499 teaches a CMP process using a two-layer polishing cloth for polishing an interlevel dielectric layer.